TL F –1. Order Number DMQB FMQB DMJ. DMW or DMN. See NS Package Number J16A N16E or W16A. Function Table. datasheet, pdf, data sheet, datasheet, data sheet, pdf, National Semiconductor, Dual 4-Line to 1-Line Data Selectors/Multiplexers. The LSTTL/MSI SN54/74LS is a very high speed Dual 4-Input. Multiplexer with common select inputs and individual enable inputs for each section.

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For each combination, one indicates the logical level that must take the exit. If one has the integrated circuitone can carry out the circuit of figure How to make a site? The example which follows will clarify the procedure.

Use of a decoder out of demultiplexer. Thus to use a decoder out of demultiplexer, the entry of validation becomes the input and the entries of the decoder become the entries of ordering of the demultiplexer.

Electronic forum and Infos. The integrated circuit 74LS contains two demultiplexers with 4 ways. The data present in D is acicular towards S0 or S1 depending on the state of the entry of order A. Now let us carry the entry of validation to state 1: To find the equation simplest of S1let us draw the picture of Karnaugh figure This is made possible because the equation of the exit of a multiplexer reveals all the possible combinations of the entries of order.

One does not find a demultiplexer with 2 ways integrated. The diagram symbolic system and the mechanical equivalent of a demultiplexer with 2 ways are presented at figure If integrated logical doors are used, one obtains the circuit represented on figure The exit S with for the equation: To know how to position the other entries, one draws up a table with all the combinations of the entries of order. The advantage of the multiplexer compared to the network of doors is obvious: Return to the synopsis.

The combinative circuit which fulfills the function of the demultiplexer with 2 ways must thus correspond to the truth table of figure The stitching and the logic diagram of this circuit are given on figure 41, while figure 42 gives its truth table. We know that the majority of the decoders have their active exits at state 0 and their entry of active validation to state 0.

According to what was known as before, the four switches are connected to the four entries of order D, C, B, A of the multiplexer.

### Datasheet pdf – Dual 4-Line to 1-Line Data Selectors/Multiplexers – National Semiconductor

The stitching and the logic diagram of this integrated circuit are given on figure 32, while figure 33 gives its truth table. This one, carried to the state 1force the exit of the multiplexer corresponding to state 0 independently of the state of the other entries.

Figure 43 illustrates how one passes from a decoder to a demultiplexer. A circuit of this kind can be used datasheer the indication of breakdowns, or for the counting of parts on a production line. Click here for the following lesson or in the synopsis envisaged to this end.

## (PDF) 74153 Datasheet download

Form of the perso pages. The expressions and lead us to the logic diagram of figure The two groupings and D give us the following equation of S1: The circuit which results from it is deferred on figure Moreover, the use of a multiplexer makes it possible to pass easily from a switching function to another by ci the level of the inputs. One subjects the entry corresponding to the combination of the entries of order at the level wished at exit.

Forms maths Geometry Physics 1. Static page of welcome. One has four switches being able to be connected either to the supply voltage, or with the mass and one wants to know so at least two switches are closed again on the positive tension of food. Otherwise, it is necessary to turn to the demultiplexer integrated into 4 ways: Electronic forum and Poem.

One realizes that it is necessary to employ several types of doors, of the doors OR with 3 entriesa door OR at 2 entries and a door AND 4 entries. For each combination of the entries of order, one defers in the column of the exit the state that this one must take. Information, present on the input, is acicular towards the exit selected ix the state of the entries of order.

Since all the combinations of the entries A, B, C and D are present in this equation, we can fulfill with this multiplexer any switching datashet comprising the same number of entries, that is to say 4.